121. Hardware/Software Codesign Group estimates of program execution times for any characterized target processor, by first The same method is used to synchronize hardware and software blocks http://www-cad.eecs.berkeley.edu/~polis/

A Framework for Hardware-Software Co-Design of Embedded Systems Motivation for HW/SW Co-Design Introduction to POLIS Hardware/Software Co-design Group Documentation for Users ... Cadence Cierto VCC : a commercial system-level design tool based on ideas from POLIS Please send questions or comments to polis-questions@ic.eecs.berkeley.edu Motivation for HW/SW Co-Design Embedded controllers for reactive real-time applications are implemented as mixed software-hardware systems. These controllers utilize Micro-processors, Micro-controllers and Digital Signal Processors but are neither used nor perceived as computers. Generally, software is used for features and flexibility, while hardware is used for performance. Some examples of applications of embedded controllers are: Consumer Electronics: microwave ovens, cameras, compact disk players. Telecommunications: telephone switches, cellular phones. Automotive: engine controllers, anti-lock brake controllers. Plant Control: robots, plant monitors. Design of embedded systems can be subject to many different types of constraints, including timing, size, weight, power consumption, reliability, and cost. Current methods for designing embedded systems require to specify and design hardware and software separately. A specification, often incomplete and written in non-formal languages, is developed and sent to the hardware and software engineers. Hardware-software partition is decided

122. Integrated Development Environment For Multiple Processor SOC Hardware And Softw Press release Tensilica Introduces Industry s First Integrated Development Environment for Multiple Processor SOC hardware and Software Design. http://www.tensilica.com/html/pr_2003_06_16a.html

Tensilica Introduces Industry’s First Integrated Development Environment for Multiple Processor SOC Hardware and Software Design Software Development, Processor Optimization and SOC Architecture Tools Integrated Into One Common Environment SANTA CLARA, Calif., June 16, 2003 – Tensilica, Inc. the leading supplier of configurable and extensible microprocessor cores, today introduced Xtensa Xplorer, the first integrated design environment (IDE) for SOC development that integrates software development, processor optimization and multiple-processor system-on-chip (SOC) architecture tools into one common design environment. Tensilica’s Xplorer IDE is a visual environment with a host of new automation tools that makes creating Xtensa processor-based SOC hardware and software much easier. “Until now, IDEs have been used only for software development,” stated Bernie Rosenthal, Sr. Vice President of Sales and Marketing at Tensilica. “By extending the concept to hardware design, our customers get one integrated platform to efficiently design both the hardware and software together, make trade-offs with different processor configurations, and track projects.” Xplorer serves as a cockpit for basic design management, invocation of Tensilica processor configuration tools (Xtensa processor generator, TIE Compiler) and software development tools. Xtensa Xplorer is particularly useful for the development of TIE (Tensilica Instruction Extension) instructions – designer-defined instruction extensions to the Xtensa processor – that maximize performance for a particular application. Different Xtensa processor and TIE configurations can be saved, profiled against the target C/C++ software, and compared. Xtensa Xplorer even includes automated graphing tools that create spreadsheet-style comparison charts of performance.

A  B  C  D  E  F  G  H  I  J  K  L  M  N  O  P  Q  R  S  T  U  V  W  X  Y  Z

Page 7     121-122 of 122    Back | 1  | 2  | 3  | 4  | 5  | 6  | 7